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This Wiki is intended for use by the CHREC VT Project 1 Team examining Model-Based Engineering for High-Performance Reconfigurable Computing. This Wiki is supported by the NSF CHREC Partners, Members, and the NSF Industry/University Cooperative Research Center Program.
Description: The abstraction level of Reconfigurable Computing (RC) has been stymied at the hardware design level, slowing productivity and acceptance of these devices for the wider range of applications. While devices such as FPGAs are programmable, they are treated fundamentally different than software – requiring a substantial amount of hardware design knowledge to produce. Yet, there are some advances in model-base engineering that are yielding promising results in the software community for a similar problem. This project is to explore how the use of RC patterns, separation of concerns (modeling), transformations and mappings can be used to move the abstractions to higher levels for programming RC devices in systems. Through an exploratory prototype we will examine how these concepts apply to components in a software defined radio (SDR) application. The research objective is to see where the principles hold and breakdown, and to hypothesize what promise this holds for improving RC application development productivity.
Goals: (a) Explore Model-Based Engineering (MBE) in High-Performance Reconfigurable Computing (b) Investigate methods to raise abstraction level and address relevant separation of concerns (c) Explore methods to re-compose/generate applications via transformations and mappings
Challenges: (a) Developing effective exploratory MBE prototype in a software defined radio (SDR) application (b) Identify where MBE principles hold/breakdown (c) Evaluate MBE for improving productivity
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Topic revision: r15 - 05 Nov 2010 - 23:45:48 - KarlPereira